Conventional telephone communication systems over local area networks, such as the standard Ethernet network or other network systems, conventionally employ a transmitting analog-to-digital converter at the transmitting end and a receiving digital-to-analog converter at the receiving end in an attempt to operate at the same sampling rate. An example of such a system is shown in FIG. 1 of the drawings which is labeled prior art.
The prior art transmitting and receiving system 10 consists of a transmitter 12 and a receiver 13. In the system of FIG. 1, analog signals from the telephone at the transmitting end are supplied on the line 14 to an analog-to-digital converter 16, which samples the analog signals at sampling times that are determined by the transmit clock 18, which is connected to the analog-to-digital converter 16 over the line 1.
The output of the sampled A/D converter is supplied on the line 20 to a transmit buffer storage device 24. The transmit buffer 24 may be a shift register which is controlled by the transmit clock 18 over the cable 26. As the sample data is received, it is grouped into "packets", such as the packets 28 and 30 which are stored in the transmit buffer 24. The first packet received from the A/D converter 16 on the line 20 is shifted through the buffer so that it is the first packet which is transmitted out of the buffer on line 32 and over the LAN 34. Thus, the packet 28 in the buffer 24 represents a sample of data which has been sampled at time prior to the packet 30.
After transmission over the LAN, the signals are received on the line 36 and are reassembled into packets and stored in the receive buffer 38. The receive buffer, like the transmit buffer, is a first-in/first-out (FIFO) type of device, such as a shift register, so that the packet 40 is a sample packet which preceded the packet 42 in time at the transmitting sampling point of the A/D converter 16. The packet 40 will then be sent out of the receive buffer 38 over the line 44 prior to the transmission of the packet 42 under the control of the receive clock 46, which applies clock signals on the lines 48 and 50. The digital-to-analog converter 52 supplies its analog output signal to the telephone at the receiving end over the line 54.
In a conventional LAN all network Hosts are attached to the same transmission medium which may be a baseband coaxial cable. The packets that are transmitted consist of data and control information such as source and destination addresses. The packets are then given to the network and routed from the source computer to the destination computer on a packet by packet basis and, therefore, network resources are only allocated when data is actually being transmitted which improves the overall efficiency of the network. When no transmissions are taking place on the cable, any Host may begin transmitting its own packet to another destination Host. When the destination Host recognizes the packet containing its address as its destination, it processes the packet and passes the information to its own computer. All other Hosts on the network disregard the packet since it did not contain their address as the destination. When collisions occur between the data, retransmission attempts are made according to the "truncated binary exponential" back-off method specified by the Ethernet protocol.
In practice the type of system described in FIG. 1 is designed so that the transmit clock 18 and the receive clock 46 will operate at the same sampling rate. However, in operation there will always be small differences between the transmit and receiving clock frequencies. When this occurs the number of packets in the receive buffer will grow or diminish an average rate which is a function of the difference between the rate that the packets are received in the transmit buffer 24 and the receive buffer 38. If the analog-to-digital conversion is digitizing at a slower rate than the digital-to-analog conversion, it is possible that the receiver buffer can become empty which will result in periods of unwanted silence. On the other hand if the analog-to-digital conversion is digitizing at a faster rate than the digital-to-analog conversion then the buffer can completely fill up or saturate and thus cause speech packets to be missed by the transmitter.
The present invention, is directed to solving the problem mentioned in the Background of the Invention wherein the receive and transmit buffers may operate at different rates. This can result in either the receive buffer completely filling up, or in its missing a speech packet or becoming empty, resulting in periods of unwanted silence. This problem is solved by the present invention by controlling the receive buffer clock so that it operates at either a slower rate than the transmission buffer clock when the transmitted data rate is low, or at a faster rate than the transmission buffer clock when the transmitted data rate is high.